Crocus Advances its MRAM Business and Manufacturing Infrastructure

Crocus continues commercializing its Magnetic Logic Unit (MLU) MRAM at an impressive rate.  MLU MRAM is a variety of the general category of thermally assisted (TAS) MRAM.

On the IP side of the equation, Crocus extended its technology base to over 100 issued and pending patents in magnetic semiconductor technology after the recently announced acquisition of the MRAM patent portfolio of NXP Semiconductors in Eindhoven, Holland. The company’s wide range of IP now covers materials and devices, as well as design and product technology.  Additionally, Crocus and IBM recently announced a joint agreement that includes technology co-development and cross licensing to merge their MRAM technologies, including access to IBM’s processing capabilities.

Crocus has also achieved a formidable manufacturing base.  Following an initial R/D partnership with SVTC in San Jose, California and existing production at its foundry partner Tower Jazz Semiconductor, the new IBM agreement also allows Crocus access to technology beyond the current 130-nm mode supported by Tower Jazz.  The IBM agreement might also provide technological assistance to the Crocus venture with the Rusnano-funded subsidiary Crocus Nano Electronics (CNE) for the eventual production of high-capacity stand-alone MRAM wafers.  The CNE fab is expected to be in operation in 2013 at 90- to 65nm, with the potential for finer process technologies in the future, and will have the capability to add MRAM-specific processing layers to standard 300-mm CMOS wafers.

Crocus has also recently established a source for those base wafers—China’s Semiconductor Manufacturing International Corporation (SMIC).  The two companies announced on December 9 a joint technology and wafer manufacturing agreement under which a high-temperature MLU MRAM technology will be developed.  SMIC will manufacture the CMOS base wafers; final processing is planned to take place at CNE.

The advances in the product marketing should also not be overlooked.  Crocus recently announced a joint program with French startup Starchip to develop MLU memory and logic functionality for next generation secure processor-based architectures.  Starchip’s three cofounders, formerly members of Atmel’s Smart Card Business Unit, recently raised 1.5 million € during the company’s third round of financing.

This program in turn supports a previously announced agreement between Crocus and Morpho, a leading supplier of e-document solutions in Europe, to develop Smart Cards based on MLU technology.  Crocus’ MLU technology is expected to replace the NAND Flash technologies used in the first generation of the Smart Cards.

Any new and emerging memory technology has to eventually deliver the anticipated value, and there is no reason to doubt that Crocus’ MLC will succeed.

In the meantime, Crocus is developing an extremely focused and well-coordinated business and manufacturing infrastructure.

www.convergentsemiconductors.com - Global Analysis of Memory Strategies and Issues 

IMEC Paper at IEDM Presents 10x10nm ReRAM Memory Cell

In our previous blog regarding Micron and Sony’s ReRAM program, we had also identified IMEC’s program in exploring some of the potential features of the technology. Today it is reported that one of the 17 papers being presented this week by IMEC at the 2011 IEEE Electron Devices Meeting includes a fully-functioned HfO2-based ReRAM cell with an area of less than 10x10nm.

The press release also points to the general concern within the industry that the increased complexity in continuing to scale today’s high-volume memory technologies is one of the motivations for the research in new memory cell technologies.

In our blog of May 2 titled "Is the Semiconductor ‘Memory Wall’ Finally Crumbling?", we observed that barriers also loom ahead for logic designs for a different set of reasons. The manufacturing challenges of 3D transistors and the ability to cost-effectively achieve the performance potential of multi-core processors are all likely to be no less challenging that those related to new and emerging memory technologies.

To increase the sense of urgency even while these two major semiconductor industry elements of memory and logic are preparing to meet those manufacturing challenges, the fundamental target applications for the development of new memory technologies is rapidly shifting from the single focus of the desktop PC era toward a much more diversified set of OEM expectations. The completed picture includes not only the diverse and still-evolving expectations of server and data storage applications we previously discussed, but the equally challenging trend toward providing mobile solutions for any data collection or personal computing application.

This rapidly-evolving market environment obsoletes a widely-held view of the past 20 years’ history of memory technologies that any new memory product has to compete with an existing high-volume product on a cost-per-bit basis before it will ever be accepted. Regardless of the technology, the true equation has always been that the competition is based on both cost and performance, but the single-application focus on desktop PCs for the past decade effectively masked any support for a wider set of memory performance attributes.

While IMEC’s paper does not necessarily validate one memory technology over all other contenders, the concluding sentence of the press release certainly demonstrates the breadth of interest in new and emerging memory technologies: “These results were obtained in cooperation with IMEC’s key partners in its core CMOS programs Globalfoundries, INTEL, Micron, Panasonic, Samsung, TSMC, Elpida, Hynix, Fujitsu and Sony.”

Contact us (bobm@convergentsemiconductors.com) for information for Convergent Semiconductors’ hot-topic report on ReRAM regarding applications, challenges and infrastructure opportunities.

www.convergentsemiconductors.com - Global Analysis of Memory Strategies and Issues 

Micron and Sony Resistive RAM Joint Development Program

There was a recent—and extremely brief—reference to a joint development program between Sony and Micron on ReRAM that was reported from comments made at a recent media roundtable. This article on November 28 attracts more speculation due to the lack of details rather than the information contained in the press release.

"(Jiji Press English News Service Via Acquire Media NewsEdge) Tokyo, Nov. 28 (Jiji Press)--Sony Corp. said Monday it has started to develop a next-generation memory chip with Micron Technology Inc. of the United States.

Sony aims to make the resistance random access memory, or ReRAM, commercially available over the next three or four years.

The chip has the potential to become a major business, Sony Executive Deputy President Hiroshi Yoshioka said at a press conference."

This joint development also follows a Micron announcement a month ago of a technology collaboration with Singapore’s Data Storage Institute on STT MRAM.

Considering Micron’s previous high visibility acquisition of Intel’s Phase Change Memory (PCM) program, these new announcement are likely part of the regular activity of all memory companies to keep abreast of any potentially critical new technologies.

However, Micron already has a long history in ReRAM that can be traced back to there 2002 licensing of Axon Technologies’ Programmable Metallization Cell (PMC) technology.

Axon’s program is considered by many to be the initial source of the current interest in the growing family of resistive memory cell technologies. You may recall that Infineon was developing a version of the technology under the name of CBRAM that was based on a 2004 license with Axon. As IMEC and other companies continue to explore a wide range of materials that broadly fall into that category of resistive RAM technologies, the ReRAM with the most momentum at the moment is likely the Adesto development program that had also acquired the Infineon/Qimonda CBRAM IP.

While the public perception of memory technologies tends to assume that no new technology will be acceptable until it reaches the same cost per bit of DRAM or NAND, we believe that the continued interest in these new and emerging technologies is based on finding other market entry points and an expectation of providing high value to new applications.

In the specific case of Micron’s recently announced activities in these two additional technologies, it does raise the question of how that company can best allocate resources among DRAM, NAND, Hybrid Memory Cube, Reduced Latency DRAM, PCM, ReRAM, and STT MRAM. However since Micron remains the oldest existing high-volume memory company and has therefore weathered more market and technology storms than any other memory company, they have certainly gained the experience to combine these technologies into a cohesive package.

Even if this does look like an unworkable mash-up at first glance, we also believe that the performance attributes of PCM, ReRAM, and STT MRAM will all eventually support different applications anyway. As we have stated before, our market model is one in which the value proposition of the memory technologies increases as the industry moves further away from the desktop PC era and into the new era of multiple targets for the development of new memory technologies.

While it is not clear yet how quickly these new memory technologies will reach high volume production, there are two trends that are becoming more pronounced. One trend we have previously reported is that OEMs are asking for a wider range of memory technology performance attributes than any time in the past.

Micron’s recent technology announcements underline the second trend—that memory companies also anticipate changes in the traditional market conditions and are responding with technology development commitments for new and emerging memory technologies.

www.convergentsemiconductors.com - Global Analysis of Memory Strategies and Issues