GSA (Global Semiconductor Alliance) recently announced a new 3D IC Initiative to help accelerate an industry-wide transition to make 3D IC technically feasible as well as cost effective. We had written of the potential that TSV and 3D IC packaging offers to memory technologies on EDN’s Professor Memory site over a year ago in January 2010.
We continue to believe that this packaging concept provides the opportunity for memory companies to establish a higher value in this subsystem configuration of multi-die packages than was possible during the mainframe computing and desktop PC eras. With the emphasis of that original blog on new and emerging memory technologies, we noted that:
“TSV and other 3D packaging technologies provide the manufacturing platform that supports a more controlled and gradual introduction of the new and emerging memory technologies… Rather than a single application such as the PC that propels a single memory technology into ‘winner-take-all’ dominance as was the case with DRAM, I anticipate that the conjunction of 3D packaging, single-core processors, and emerging memory technologies will be the platform that drives a wide range of non-volatile memory technologies into a number of applications.“This flexibility and potential for more product differentiation is a welcome change to memory suppliers. Samsung and Micron have grasped the implications of this shift and are aggressively pursuing the opportunity. Samsung announced in December that the company “…has begun mass production of 8GB DDR3 memory modules based on the SODIMM form factor used by many notebooks and mobile workstations.” The modules are based on 4gbit, 1.5V, 40nm, DDR3 memory chips using 3D TSV chip-stacking technology operating at 1,333MHz. A single 8GB DDR3 module using the new technology is claimed to offer a 53% power savings compared to two 4GB DDR3 modules. This first product is only a two-chip stack, but the company has previously released very impressive preliminary results using much higher stacking levels.
Micron’s COO Mark Durcan is also reported to have commented at a recent IEEE ISS meeting that Micron is also “sampling products based on TSVs” and that full production of TSV-based 3D chips is slated over the next year to year-and-a-half.
Hynix also announced earlier this month that the company has joined Sematech’s 3D Interconnect program. As a wide range of I/O memory-based products are beginning to gain momentum, the company anticipates that a stacked wide I/O DRAM will be very successful in mobile applications.
The two remaining major memory suppliers, Elpida and Toshiba, have also announced programs since our original blog. Elpida and UMC have had a joint development program for 3D IC Integration development in place since June 2010, and Toshiba announced a plan earlier this month to expand to new types of 3D memory stacks. Toshiba plans to start construction of a new plant in July of this year for a 20nm class NAND along with potential to stack both vertically as well as horizontally.
While some major companies are still searching for an application that justifies the effort, we believe that memory companies have grasped the game-changing potential. As we concluded in the original blog, “The conceptual shift is that the memory technology becomes enabled by the (multi-die) platform, not by a single high-volume application.” The prospects of OEM support for a higher level of product differentiation among memory suppliers may seem a new concept to many, but that illusive goal may be within reach as higher-performance mobile products and single-core processors push toward a wider range of memory performance attributes.
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